Active HIGH Input S-R Latch


                                   LATCHES


The latch is a type of bistable logic device [bistable : A digital circuit that has two gating inputs and output] and temporary storage device that hold single bit of information.

Types of latches :

  • SR Latch
  • D Latch

SR (SET - RESET) Latch

Active HIGH input SR Latch - [NOR Gate based SR Latch]

In the Active HIGH input SR Latch, the latch changes its state based on inputs that are in the HIGH logic state.
                    
                    S(Set) input is active HIGH, Latch will be Set(Q = 1)
                    R(Reset) input is active HIGH, Latch will be Reset(Q = 0)




Animation of Active HIGH input S-R Latch



Case 1:
R = 1      S = 0         
If either or both inputs are HIGH , the output of the NOR gate will be LOW. So,  
Q = 0       Q’ = 1 
When the Q output is LOW , the latch is in the RESET state.

Case 2:

R = 0     S=0
R input changes to 0.Then Q output will stay at 0 , maintaining the previous state. In this case, there is no change in the outputs. This is called MEMORY state.

Q = 0    Q' = 1

Case 3:

R = 0      S = 1       
If either or both inputs are HIGH , the output of the NOR gate will be LOW. So,
Q = 1     Q’ = 0
When the Q output is HIGH , the latch is in the SET state.

                            


Case 4:

R = 0     S = 0
S input Changes to 0. There is no change in the outputs , maintaining the previous state. So this is also MEMORY state.

Q = 1     Q' = 0

Case 5 :

R= 1   S = 1

Q = 0  Q’=0

This is forbidden for both Q and its complement Q’ to be in the state where both are 0 simultaneously. This condition is known as an indeterminate state because it violates the fundamental property that Q and Q’ should be complementary. And also this state can’t predict the next state. 

As an example , in the next state, where  Set(S) equals 0 and  Reset(R) equals 0 , output will  depend on the propagation delay of the logic gates.  

Function Table of the Active HIGH input S-R Latch











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